My personal highlights are the new web assembly based translator system, and the improvements to our waveform control protocol, and you can read the full change log at gitlab.com/surfer-proje...
My personal highlights are the new web assembly based translator system, and the improvements to our waveform control protocol, and you can read the full change log at gitlab.com/surfer-proje...
Desmond Kirkpatrick’s blog shows how ROHD and LLMs enable agile, test-driven hardware evolution.
📝 buff.ly/kKimODN
Join the community 👉 buff.ly/MKcOpvD
#AI #EDA #OpenSourceHardware #Hardware #ROHD
Desmond Kirkpatrick’s blog shows how ROHD and LLMs enable agile, test-driven hardware evolution.
📝 buff.ly/kKimODN
Join the community 👉 buff.ly/MKcOpvD
#AI #EDA #OpenSourceHardware #Hardware #ROHD
Intel’s Desmond Kirkpatrick shows how LLMs + the ROHD framework can assist hardware engineers in real-time design and verification.
🎥 Watch: buff.ly/VQTogJb
#AI #HardwareDesign #ROHD #AgileHardware #OpenSource #Semiconductors
Intel’s Desmond Kirkpatrick shows how LLMs + the ROHD framework can assist hardware engineers in real-time design and verification.
🎥 Watch: buff.ly/VQTogJb
#AI #HardwareDesign #ROHD #AgileHardware #OpenSource #Semiconductors
⚡️ Instant code generation
🔬 Surgical updates in the same file
🔎 Report outdated/wrong code as lint warnings
🪄 Auto-regenerate outdated/wrong code via 'dart fix'
⚡️ Instant code generation
🔬 Surgical updates in the same file
🔎 Report outdated/wrong code as lint warnings
🪄 Auto-regenerate outdated/wrong code via 'dart fix'
See the full changelog here:
See the full changelog here:
It comes with:
✒️ Simpler and more Flutter-like syntax
🪄 Optimized performance and stability
🎨 More styling properties
Oh, and all breaking changes can be migrated fully automatically.
Check 🧵for details
It comes with:
✒️ Simpler and more Flutter-like syntax
🪄 Optimized performance and stability
🎨 More styling properties
Oh, and all breaking changes can be migrated fully automatically.
Check 🧵for details
See the announcement blog post for more details:
See the announcement blog post for more details:
Is the perfect question to frame common learning curve hurdles that folks need to get over when learning HDL.
www.reddit.com/r/FPGA/comme...
#fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda
This release has some nice bug fixes, performance enhancements, and new convenient APIs for SynthBuilder and FiniteStateMachine. Check it out!
This release has some nice bug fixes, performance enhancements, and new convenient APIs for SynthBuilder and FiniteStateMachine. Check it out!
This release has tons of new stuff, including arbitrary-width floating/fixed point arithmetics, reduction trees, clock gating, counters, finders, error correcting, standard interfaces, and much more for free! buff.ly/6eyZEOi
This release has tons of new stuff, including arbitrary-width floating/fixed point arithmetics, reduction trees, clock gating, counters, finders, error correcting, standard interfaces, and much more for free! buff.ly/6eyZEOi
It's so cool to finally see this on the official site. 🤩
It's so cool to finally see this on the official site. 🤩
No digital logic, just ~30 op amps and 70-80 resistors, a bunch of capacitors and a few analog switches. All assembled during a 48 hour game jam
No digital logic, just ~30 op amps and 70-80 resistors, a bunch of capacitors and a few analog switches. All assembled during a 48 hour game jam