Don't forget Faynmens Lectures!

Booklist includes:
- students guide to waves
- electromagnetic waves
- applied electromagnetics
- electromagnetic universe
- Faraday, Maxwell, and the electromagnetic field
(is this possible??)
Thank you, Ali, for the book recommendations

Diving deeper into TCL scripting. Generating TCL with GPTs is powerful, but understanding what’s happening under the hood is key to building bigger, more scalable systems

Current project: The shift register works. A simple project, but small wins encourage momentum towards bigger goals.
Next project: Checking out ChipVault IDE and revisiting FSMs

Working through Mastering FPGA Chip Design 📘. Each chapter has been an eye-opener—especially in areas I didn’t fully get in school. Step one: got the board running from the command line and shifting LEDs with shift registers! Learning a lot and sharing progress as I go.

The smoothest Vivado setup I’ve ever had 🚀
Back at Oregon State, being lab TA for digital logic made me expect hours of setup pain. Instead, using Mastering FPGA Chip Design, I had my Nexys A7 up and running in under 15 minutes.
Totally worth it (not sponsored).

Next up: FPGA Ethernet stack ⚡️
Goal: implement UDP directly on FPGA — starting from MAC, ARP, IP, then UDP.
Applying the same low-level discipline, but now at the packet/frame level.

Changelog (SPI):
Done:
✅Receive Data
Next: Interrupts, IRQ handling

Changelog (SPI):
Done:
✅ Clock Control
✅ Init
✅Send Data
Next: Receive Data, Interrupts, IRQ handling

Status: SPI driver abstraction
Defined config & handle structs to keep the peripheral layer clean and portable:

Status: SPI driver abstraction
Defined config & handle structs to keep the peripheral layer clean and portable:

Done:
✅Clock ctrl
✅ Reg init
✅ Reset macros
TODO: FD, HD, Simplex RX, Simplex TX, CPOL/CPHA combos, 8/16-bit frames, SSM/SSI, SSOE

Thanks for sharing this! 🙏 The breakdown of BSP vs driver vs board config really clarified how to keep HAL isolated and make drivers reusable.