InstLatX64
@instlatx64.bsky.social
x86/x64, SIMD, #AVX512, "Aha!" moments.
I have been writing code since 1986.
Budapest, Europe
https://instlatx64.github.io/InstLatx64/
I have been writing code since 1986.
Budapest, Europe
https://instlatx64.github.io/InstLatx64/
cc: @fclc.bsky.social
What can means DFMA here?
What can means DFMA here?
November 11, 2025 at 1:54 PM
cc: @fclc.bsky.social
What can means DFMA here?
What can means DFMA here?
..and the favorite
VPTERNLOG[B,W] - how useful would be this! e.g. byte granularity, single-uop (mask)?0:(c?a:b)
Source:
www.sandpile.org/x86/opc_3.htm
3/3
VPTERNLOG[B,W] - how useful would be this! e.g. byte granularity, single-uop (mask)?0:(c?a:b)
Source:
www.sandpile.org/x86/opc_3.htm
3/3
sandpile.org -- x86 architecture -- 3 byte opcodes
www.sandpile.org
November 11, 2025 at 1:44 PM
..and the favorite
VPTERNLOG[B,W] - how useful would be this! e.g. byte granularity, single-uop (mask)?0:(c?a:b)
Source:
www.sandpile.org/x86/opc_3.htm
3/3
VPTERNLOG[B,W] - how useful would be this! e.g. byte granularity, single-uop (mask)?0:(c?a:b)
Source:
www.sandpile.org/x86/opc_3.htm
3/3
#AVX512BITALG2 completes these useful instructions:
VPLZCNT[B,W] - the missing byte & word LZCNT
VPTZCNT[B,W,D,Q] - Analogous to LZCNT[B,W,D,Q]
VPADD[,U]S[D,Q] - saturated signed / unsigned addition for dword / qword (but why there isn't VPSUB[,U]S[D,Q]?)
2/3
VPLZCNT[B,W] - the missing byte & word LZCNT
VPTZCNT[B,W,D,Q] - Analogous to LZCNT[B,W,D,Q]
VPADD[,U]S[D,Q] - saturated signed / unsigned addition for dword / qword (but why there isn't VPSUB[,U]S[D,Q]?)
2/3
November 11, 2025 at 1:44 PM
#AVX512BITALG2 completes these useful instructions:
VPLZCNT[B,W] - the missing byte & word LZCNT
VPTZCNT[B,W,D,Q] - Analogous to LZCNT[B,W,D,Q]
VPADD[,U]S[D,Q] - saturated signed / unsigned addition for dword / qword (but why there isn't VPSUB[,U]S[D,Q]?)
2/3
VPLZCNT[B,W] - the missing byte & word LZCNT
VPTZCNT[B,W,D,Q] - Analogous to LZCNT[B,W,D,Q]
VPADD[,U]S[D,Q] - saturated signed / unsigned addition for dword / qword (but why there isn't VPSUB[,U]S[D,Q]?)
2/3
Sources:
[1]: lore.kernel.org/all/17617415...
[2]: docs.amd.com/v/u/en-US/58...
[3]: deic.dk/sites/defaul...
[4]: www.phoronix.com/image-viewer...
2/2
[1]: lore.kernel.org/all/17617415...
[2]: docs.amd.com/v/u/en-US/58...
[3]: deic.dk/sites/defaul...
[4]: www.phoronix.com/image-viewer...
2/2
October 29, 2025 at 6:55 PM
Sources:
[1]: lore.kernel.org/all/17617415...
[2]: docs.amd.com/v/u/en-US/58...
[3]: deic.dk/sites/defaul...
[4]: www.phoronix.com/image-viewer...
2/2
[1]: lore.kernel.org/all/17617415...
[2]: docs.amd.com/v/u/en-US/58...
[3]: deic.dk/sites/defaul...
[4]: www.phoronix.com/image-viewer...
2/2
October 14, 2025 at 7:37 AM
October 14, 2025 at 7:18 AM