InstLatX64
@instlatx64.bsky.social
x86/x64, SIMD, #AVX512, "Aha!" moments.
I have been writing code since 1986.
Budapest, Europe
https://instlatx64.github.io/InstLatx64/
I have been writing code since 1986.
Budapest, Europe
https://instlatx64.github.io/InstLatx64/
There are a few working #WildCatLake among #Intel test machines: (CPUID D06D1, 6c/6t (2P+4LPE probably), 2500 MHz base freq, no HTT, no AVX512, I think Intel 18A)
intel-gfx-ci.01.org/tree/intel-x...
#CougarCove #Darkmont
intel-gfx-ci.01.org/tree/intel-x...
#CougarCove #Darkmont
February 14, 2026 at 9:22 AM
There are a few working #WildCatLake among #Intel test machines: (CPUID D06D1, 6c/6t (2P+4LPE probably), 2500 MHz base freq, no HTT, no AVX512, I think Intel 18A)
intel-gfx-ci.01.org/tree/intel-x...
#CougarCove #Darkmont
intel-gfx-ci.01.org/tree/intel-x...
#CougarCove #Darkmont
According to this LLVM patch, #AMD CPUID BD0F00 is #Annapurna, a #Zen5 based #EPYC Embedded for Network Control Planes:
github.com/llvm/llvm-pr...
github.com/llvm/llvm-pr...
February 13, 2026 at 9:34 PM
According to this LLVM patch, #AMD CPUID BD0F00 is #Annapurna, a #Zen5 based #EPYC Embedded for Network Control Planes:
github.com/llvm/llvm-pr...
github.com/llvm/llvm-pr...
#Intel #Xeon600 Processors for Workstation (GNR-W) - Turbo Tables:
www.intel.com/content/www/...
#GraniteRapidsW #GNRW
www.intel.com/content/www/...
#GraniteRapidsW #GNRW
February 13, 2026 at 9:18 AM
#Intel #Xeon600 Processors for Workstation (GNR-W) - Turbo Tables:
www.intel.com/content/www/...
#GraniteRapidsW #GNRW
www.intel.com/content/www/...
#GraniteRapidsW #GNRW
February 11, 2026 at 8:36 AM
#Intel released the 90th edition of the Software Developer’s Manuals with canonized #FRED, #ArchitecturalPEBS, Asymmetric RDT-M & RDT-A
All-in-One:
cdrdv2-public.intel.com/874240/32546...
Changes v82:
cdrdv2-public.intel.com/874239/25204...
#LKGS, #PBNDKB
All-in-One:
cdrdv2-public.intel.com/874240/32546...
Changes v82:
cdrdv2-public.intel.com/874239/25204...
#LKGS, #PBNDKB
February 10, 2026 at 7:21 AM
#Intel released the 90th edition of the Software Developer’s Manuals with canonized #FRED, #ArchitecturalPEBS, Asymmetric RDT-M & RDT-A
All-in-One:
cdrdv2-public.intel.com/874240/32546...
Changes v82:
cdrdv2-public.intel.com/874239/25204...
#LKGS, #PBNDKB
All-in-One:
cdrdv2-public.intel.com/874240/32546...
Changes v82:
cdrdv2-public.intel.com/874239/25204...
#LKGS, #PBNDKB
New CPUID dump:
-- 128-Core #AMD #EPYC 9754 ( #Bergamo top-SKU, #Zen4c) AA0F02
New Intel codenames:
- #Dunlow (LGA1954 entry server [1])
- #TitanLake, #HammerLake [2]
- LGA1954 socket info #NovaLake, #RazorLake [2]
#AMD #Venice info:
- B50F00, B90F00 = Dense
- BA0F00, BC0F00 = Classic
1/2
-- 128-Core #AMD #EPYC 9754 ( #Bergamo top-SKU, #Zen4c) AA0F02
New Intel codenames:
- #Dunlow (LGA1954 entry server [1])
- #TitanLake, #HammerLake [2]
- LGA1954 socket info #NovaLake, #RazorLake [2]
#AMD #Venice info:
- B50F00, B90F00 = Dense
- BA0F00, BC0F00 = Classic
1/2
February 8, 2026 at 9:27 AM
New CPUID dump:
-- 128-Core #AMD #EPYC 9754 ( #Bergamo top-SKU, #Zen4c) AA0F02
New Intel codenames:
- #Dunlow (LGA1954 entry server [1])
- #TitanLake, #HammerLake [2]
- LGA1954 socket info #NovaLake, #RazorLake [2]
#AMD #Venice info:
- B50F00, B90F00 = Dense
- BA0F00, BC0F00 = Classic
1/2
-- 128-Core #AMD #EPYC 9754 ( #Bergamo top-SKU, #Zen4c) AA0F02
New Intel codenames:
- #Dunlow (LGA1954 entry server [1])
- #TitanLake, #HammerLake [2]
- LGA1954 socket info #NovaLake, #RazorLake [2]
#AMD #Venice info:
- B50F00, B90F00 = Dense
- BA0F00, BC0F00 = Classic
1/2
SDE 10.5.0 (Software Development Emulator) Release Notes:
February 3, 2026 at 9:24 AM
SDE 10.5.0 (Software Development Emulator) Release Notes:
February 3, 2026 at 9:09 AM
Official #Intel #GraniteRapidsW SKU list:
www.intel.com/content/www/...
#GNR_W #AVX512 #AVX10_1 #AMX_FP16
www.intel.com/content/www/...
#GNR_W #AVX512 #AVX10_1 #AMX_FP16
February 2, 2026 at 9:45 AM
Official #Intel #GraniteRapidsW SKU list:
www.intel.com/content/www/...
#GNR_W #AVX512 #AVX10_1 #AMX_FP16
www.intel.com/content/www/...
#GNR_W #AVX512 #AVX10_1 #AMX_FP16
#Intel released the SDE 10.5.0 (Software Development Emulator), sync with 60th ISA Ext Guide:
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
February 1, 2026 at 7:24 PM
#Intel released the SDE 10.5.0 (Software Development Emulator), sync with 60th ISA Ext Guide:
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
One possible application of the #AVX512_BMM VPMACOR16x16x16 instruction is the compact index2msk function: if src2 is a full mask and src3 contains variably shifted masks, then VPMACOR16x16x16 will collect them into a single word. The order and repetitions are arbitrary.
January 31, 2026 at 7:57 PM
One possible application of the #AVX512_BMM VPMACOR16x16x16 instruction is the compact index2msk function: if src2 is a full mask and src3 contains variably shifted masks, then VPMACOR16x16x16 will collect them into a single word. The order and repetitions are arbitrary.
Third official #AMD #Zen6 docs:
"AMD64 Bit Matrix Multiply and Bit Reversal Instructions" specification #AVX512_BMM 69192 v1.00 pdf:
docs.amd.com/v/u/en-US/69...
"AMD64 Bit Matrix Multiply and Bit Reversal Instructions" specification #AVX512_BMM 69192 v1.00 pdf:
docs.amd.com/v/u/en-US/69...
January 31, 2026 at 3:07 PM
Third official #AMD #Zen6 docs:
"AMD64 Bit Matrix Multiply and Bit Reversal Instructions" specification #AVX512_BMM 69192 v1.00 pdf:
docs.amd.com/v/u/en-US/69...
"AMD64 Bit Matrix Multiply and Bit Reversal Instructions" specification #AVX512_BMM 69192 v1.00 pdf:
docs.amd.com/v/u/en-US/69...
#Intel refreshed the "In-Memory Analytics Accelerator Architecture Specification" 350295-007 pdf to 3.0:
www.intel.com/content/www/...
www.intel.com/content/www/...
January 31, 2026 at 11:12 AM
#Intel refreshed the "In-Memory Analytics Accelerator Architecture Specification" 350295-007 pdf to 3.0:
www.intel.com/content/www/...
www.intel.com/content/www/...
#AMD released the "AMD64 Flexible Return and Event Delivery (FRED) Virtualization" 69191 v1.00 pdf for #Zen6:
docs.amd.com/v/u/en-US/69...
docs.amd.com/v/u/en-US/69...
January 31, 2026 at 10:02 AM
#AMD released the "AMD64 Flexible Return and Event Delivery (FRED) Virtualization" 69191 v1.00 pdf for #Zen6:
docs.amd.com/v/u/en-US/69...
docs.amd.com/v/u/en-US/69...
January 30, 2026 at 11:58 AM
#AMD refreshed the "Using #SEV with AMD #EPYC Processors" Guide 58207 v2.0
docs.amd.com/v/u/en-US/58...
docs.amd.com/v/u/en-US/58...
January 29, 2026 at 12:37 PM
#AMD refreshed the "Using #SEV with AMD #EPYC Processors" Guide 58207 v2.0
docs.amd.com/v/u/en-US/58...
docs.amd.com/v/u/en-US/58...
#Intel refreshed the "Hardware Features and Behavior Related to Speculative Execution" page and pdf:
www.intel.com/content/www/...
Pdf:
cdrdv2-public.intel.com/758913/Hardw...
www.intel.com/content/www/...
Pdf:
cdrdv2-public.intel.com/758913/Hardw...
January 27, 2026 at 8:24 PM
#Intel refreshed the "Hardware Features and Behavior Related to Speculative Execution" page and pdf:
www.intel.com/content/www/...
Pdf:
cdrdv2-public.intel.com/758913/Hardw...
www.intel.com/content/www/...
Pdf:
cdrdv2-public.intel.com/758913/Hardw...
January 24, 2026 at 7:43 PM
Agner Fog has new version of the Nan propagation paper:
www.agner.org/optimize/nan...
www.agner.org/optimize/nan...
January 21, 2026 at 10:33 AM
Agner Fog has new version of the Nan propagation paper:
www.agner.org/optimize/nan...
www.agner.org/optimize/nan...
January 20, 2026 at 8:26 AM
#AMD released the "AMD64 Architecture Programmer’s Manual Volume 4: 128-Bit, 256-Bit, and 512-Bit Media Instructions" 26568 pdf v3.26
docs.amd.com/v/u/en-US/26...
This describes instructions up to #Zen5
#AVX512_BMM
#AVX512_FP16
#AVX_NE_CONVERT
#AVX_IFMA
#AVX_VNNI_INT8
from #Zen6 are missing
docs.amd.com/v/u/en-US/26...
This describes instructions up to #Zen5
#AVX512_BMM
#AVX512_FP16
#AVX_NE_CONVERT
#AVX_IFMA
#AVX_VNNI_INT8
from #Zen6 are missing
January 15, 2026 at 8:58 PM
#AMD released the "AMD64 Architecture Programmer’s Manual Volume 4: 128-Bit, 256-Bit, and 512-Bit Media Instructions" 26568 pdf v3.26
docs.amd.com/v/u/en-US/26...
This describes instructions up to #Zen5
#AVX512_BMM
#AVX512_FP16
#AVX_NE_CONVERT
#AVX_IFMA
#AVX_VNNI_INT8
from #Zen6 are missing
docs.amd.com/v/u/en-US/26...
This describes instructions up to #Zen5
#AVX512_BMM
#AVX512_FP16
#AVX_NE_CONVERT
#AVX_IFMA
#AVX_VNNI_INT8
from #Zen6 are missing
#Intel #NovaLakeL CPUID 300F30 appeared in coreboot source:
review.coreboot.org/c/coreboot/+...
Nothing new, just good to see
review.coreboot.org/c/coreboot/+...
Nothing new, just good to see
January 9, 2026 at 9:51 AM
#Intel #NovaLakeL CPUID 300F30 appeared in coreboot source:
review.coreboot.org/c/coreboot/+...
Nothing new, just good to see
review.coreboot.org/c/coreboot/+...
Nothing new, just good to see
January 8, 2026 at 1:21 PM