Ian Hanschen
@furan.bsky.social
I don’t have the BRAM for a depth buffer so it’s time to get the memory controller up and running for this fjord torus.
100% FPGA logic 3D pipeline, no CPU.
100% FPGA logic 3D pipeline, no CPU.
February 7, 2026 at 2:24 AM
I don’t have the BRAM for a depth buffer so it’s time to get the memory controller up and running for this fjord torus.
100% FPGA logic 3D pipeline, no CPU.
100% FPGA logic 3D pipeline, no CPU.
the 3d rast pipeline is a tools-assisted speedrun. the combo of claude code + codex is turning what would have taken years into months.
February 4, 2026 at 4:03 PM
the 3d rast pipeline is a tools-assisted speedrun. the combo of claude code + codex is turning what would have taken years into months.
come warm yourself by my 100% FPGA logic 3D rasterization pipeline… while the geometry engine (also logic) cubes.
February 2, 2026 at 9:14 PM
come warm yourself by my 100% FPGA logic 3D rasterization pipeline… while the geometry engine (also logic) cubes.
First light on real hardware. I will call it what it is when I decide it is.
February 2, 2026 at 2:36 AM
First light on real hardware. I will call it what it is when I decide it is.
there's a special disease programmers get. basically, they build a lot of stuff and every time they fight with some framework. eventually they're like "I'm gonna write my own damn framework" and then they write their own framework that innovates on the frustration.
February 1, 2026 at 5:37 PM
there's a special disease programmers get. basically, they build a lot of stuff and every time they fight with some framework. eventually they're like "I'm gonna write my own damn framework" and then they write their own framework that innovates on the frustration.
recently I rubber-ducky debugged something with claude code and then I used it to reconstruct some algorithms from expired patents so I could understand them. now it creates test benches, test harnesses, and does grunt work. we're not going back.
February 1, 2026 at 5:36 PM
recently I rubber-ducky debugged something with claude code and then I used it to reconstruct some algorithms from expired patents so I could understand them. now it creates test benches, test harnesses, and does grunt work. we're not going back.
you can guess what I'm working on.
you'll probably be right.
you'll probably be right.
February 1, 2026 at 4:07 AM
you can guess what I'm working on.
you'll probably be right.
you'll probably be right.
Got deep color (12 bits per channel) from the Terasic FMC-HDMI with the Altera Stratix V Advanced Systems Development Kit.
January 26, 2026 at 2:24 AM
Got deep color (12 bits per channel) from the Terasic FMC-HDMI with the Altera Stratix V Advanced Systems Development Kit.
whomever wrote dvi_tx/dvi_tx_tmds_enc for bit banged dvi (mike field?): thanks. modified it to encode dvi for altera's phy ip to use the hssi tx blocks on the arria v gx kit.
January 20, 2026 at 5:53 AM
whomever wrote dvi_tx/dvi_tx_tmds_enc for bit banged dvi (mike field?): thanks. modified it to encode dvi for altera's phy ip to use the hssi tx blocks on the arria v gx kit.
binge-coding with claude. reproduced the algorithms for hp color recovery from expired patents.
January 17, 2026 at 8:39 PM
binge-coding with claude. reproduced the algorithms for hp color recovery from expired patents.
if I have to stare at it, it should probably look nice
January 15, 2026 at 11:02 PM
if I have to stare at it, it should probably look nice
this claude guy does fine work🤔
January 15, 2026 at 4:00 PM
this claude guy does fine work🤔
random realization: it makes sense that the option rom header signature is 0x55 0xAA for the same reason those values are used when doing a hardware detection knock on the AT bus, or, recently, memory controller training: every other bit is set.
0x55 = 01010101
0xAA = 10101010
0x55 = 01010101
0xAA = 10101010
January 14, 2026 at 1:36 AM
random realization: it makes sense that the option rom header signature is 0x55 0xAA for the same reason those values are used when doing a hardware detection knock on the AT bus, or, recently, memory controller training: every other bit is set.
0x55 = 01010101
0xAA = 10101010
0x55 = 01010101
0xAA = 10101010
PC-FX GA GMAKER SDK Documentation (English Translation): github.com/ianhan/gmake...
GitHub - ianhan/gmaker_pcfxga_sdk_docs_claude: English translations of NEC PC-FXGA GMAKER Starter Kit (DOS/V) SDK documentation - hardware specs, library APIs, tools, and file formats
English translations of NEC PC-FXGA GMAKER Starter Kit (DOS/V) SDK documentation - hardware specs, library APIs, tools, and file formats - ianhan/gmaker_pcfxga_sdk_docs_claude
github.com
January 13, 2026 at 3:41 PM
PC-FX GA GMAKER SDK Documentation (English Translation): github.com/ianhan/gmake...
@tubetime.bsky.social did you toss your mcga documentation somewhere?
January 10, 2026 at 7:50 PM
@tubetime.bsky.social did you toss your mcga documentation somewhere?
my leenoochs box has a status display sitting off an FPGA that implements a framebuffer (for which it has a tinydrm driver). the stats are from a modified version of btop to which I've added claude usage.
January 9, 2026 at 5:09 PM
my leenoochs box has a status display sitting off an FPGA that implements a framebuffer (for which it has a tinydrm driver). the stats are from a modified version of btop to which I've added claude usage.
something 9-ish coming
January 3, 2026 at 5:12 AM
something 9-ish coming
dual cpu abit bp6 running beos with bebox style blinkenlights on an x86 over smbus.
December 18, 2025 at 5:21 AM
dual cpu abit bp6 running beos with bebox style blinkenlights on an x86 over smbus.
Reposted by Ian Hanschen
another piece in place: wrote a beos driver for the piix4 chipset to do one thing and one thing only: pass the stats - x86 with blinkenlights, my first beos driver. rip be, inc.
November 30, 2025 at 2:54 AM
another piece in place: wrote a beos driver for the piix4 chipset to do one thing and one thing only: pass the stats - x86 with blinkenlights, my first beos driver. rip be, inc.
Reposted by Ian Hanschen
two celerons walked into a bar
November 28, 2025 at 6:16 PM
two celerons walked into a bar
Turkey day fun: You can interface I2C devices with a PC’s SMBUS as long as there are no address conflicts. This is an SSD1306 based 128x32 monochrome OLED on an abit bp6 motherboard (running T2 SDE Linux). SMBCON pinout and gist follow. It is device ‘3c’ here.
November 28, 2025 at 1:11 AM
Turkey day fun: You can interface I2C devices with a PC’s SMBUS as long as there are no address conflicts. This is an SSD1306 based 128x32 monochrome OLED on an abit bp6 motherboard (running T2 SDE Linux). SMBCON pinout and gist follow. It is device ‘3c’ here.
Reposted by Ian Hanschen
Are you ready for #PicoIDE? It seems to be telling me it's ready. Coming soon: ATAPI optical disc emulation and IDE hard drive emulation. picoide.com
November 10, 2025 at 2:41 AM
Are you ready for #PicoIDE? It seems to be telling me it's ready. Coming soon: ATAPI optical disc emulation and IDE hard drive emulation. picoide.com