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znuh
@znuh.bsky.social
November 13, 2025 at 12:16 PM
Treffen sich jetzt stattdessen mit einem gewissen Diomid Medwedovski?
November 6, 2025 at 6:59 PM
October 24, 2025 at 12:21 PM
How the job interviews for the Trump admin were conducted:
October 13, 2025 at 2:17 PM
October 7, 2025 at 8:48 AM
Suggestion from a comment on Yt (under Jon Stewart's Post-Kimmel Primer on Free Speech in the Glorious Trump Era | The Daily Show video):
September 23, 2025 at 4:24 PM
August 15, 2025 at 7:22 PM
August 12, 2025 at 7:03 PM
New PCB from @aisler.net populated & working ✅
(Not a fancy SDR though. Just dual CC1101 w/ STM32s & USB.)
July 19, 2025 at 1:36 PM
July 11, 2025 at 8:16 AM
July 11, 2025 at 7:25 AM
😮‍💨
June 17, 2025 at 9:17 AM
May 24, 2025 at 5:36 PM
May 11, 2025 at 4:34 PM
Will not kill more than half of the crew 💁‍♂️
April 24, 2025 at 9:19 PM
@gog.com 👀 Y U NO accept ‪the Postmodern Adventures on your otherwise preferable platform??
April 24, 2025 at 5:30 PM
Cat #1 determined I should refrain from writing any more code at this point 🤷‍♂️
April 14, 2025 at 3:50 PM
🧑‍🍳
April 10, 2025 at 7:34 PM
Watching USpol:
April 10, 2025 at 5:41 PM
soon: 🫣
April 3, 2025 at 7:07 AM
💤
March 28, 2025 at 2:58 PM
🤔
March 26, 2025 at 9:48 PM
Here we go again...
March 26, 2025 at 9:23 PM
lab cats 🥰
March 24, 2025 at 11:01 PM
Oh wow, I just figured out why I used 0.6mm vias for several boards. The AISLER KiCad DRU files from github are correct in the Design Rule Constraints, but the Default Netclass has the via diameter set to 0.6mm. Apparently KiCad 8 never showed DRC errors for such vias (?!), but KiCad 9 does.
March 23, 2025 at 9:43 AM