WifiCable
@wificable.bsky.social
I do silly stuff with tech
You can call me Wifi
Github (mostly PCBs): https://github.com/a-little-wifi/
The other place: https://twitter.com/WifiCable_
You can call me Wifi
Github (mostly PCBs): https://github.com/a-little-wifi/
The other place: https://twitter.com/WifiCable_
not baaddd, getting there
May 5, 2025 at 3:33 AM
not baaddd, getting there
could be going better, but luckily this is mostly a practice run on the least interesting board
May 5, 2025 at 3:15 AM
could be going better, but luckily this is mostly a practice run on the least interesting board
modular curved gaming ram slot 😭
May 5, 2025 at 2:05 AM
modular curved gaming ram slot 😭
Don't worry, I didn't destroy a perfectly good ram slot. I'm trying to revive a board that had both slots damaged already by soldering on an intact replacement.
May 5, 2025 at 2:07 AM
Don't worry, I didn't destroy a perfectly good ram slot. I'm trying to revive a board that had both slots damaged already by soldering on an intact replacement.
I've left some short instructions in the github readme, but if someone wants to actually try it themselves and needs more help you're welcome to ask for help in the issues section on that repository.
April 16, 2025 at 9:31 AM
I've left some short instructions in the github readme, but if someone wants to actually try it themselves and needs more help you're welcome to ask for help in the issues section on that repository.
Physically you flash to the BIOS chip, but it's not actually the BIOS region on the chip that is modified for this. Instead as far as I know the Intel Flash Image Tool modifies the ME region which is also responsible for configuring the PCH's Flex I/O.
April 16, 2025 at 9:31 AM
Physically you flash to the BIOS chip, but it's not actually the BIOS region on the chip that is modified for this. Instead as far as I know the Intel Flash Image Tool modifies the ME region which is also responsible for configuring the PCH's Flex I/O.
Oh I shouldn't forget, thanks to @aisler.net for sponsoring the board for this project, using their recently added 0.8mm 4 layer PCB service which is perfect for custom M.2 cards like this!
April 15, 2025 at 1:35 PM
Oh I shouldn't forget, thanks to @aisler.net for sponsoring the board for this project, using their recently added 0.8mm 4 layer PCB service which is perfect for custom M.2 cards like this!
I've been testing it on a ThinkCentre M720q but haven't gotten it to work fully over there yet. More research to be done.
April 15, 2025 at 1:33 PM
I've been testing it on a ThinkCentre M720q but haven't gotten it to work fully over there yet. More research to be done.
In theory this can be applied to any multi-lane PCIe port running off of the PCH in an Intel system, as long as you have the appropriate version of the Intel Flash Image Tool and a bifurcation PCB that physically fits where you need it.
April 15, 2025 at 1:33 PM
In theory this can be applied to any multi-lane PCIe port running off of the PCH in an Intel system, as long as you have the appropriate version of the Intel Flash Image Tool and a bifurcation PCB that physically fits where you need it.
I see, that's a pretty smart place to look for this kind of info yeah, hadn't thought of that yet. Interesting remark from Intel, I assumed the expectation is that all traces are length matched at the connector of the memory module. Thanks!
October 18, 2024 at 9:39 PM
I see, that's a pretty smart place to look for this kind of info yeah, hadn't thought of that yet. Interesting remark from Intel, I assumed the expectation is that all traces are length matched at the connector of the memory module. Thanks!
Ayo what this thing has a socketed bios chip?? Need more of that fr
October 18, 2024 at 3:30 PM
Ayo what this thing has a socketed bios chip?? Need more of that fr
Didn't have the correct power cable 😭 (don't worry, my soldering has improved a lot since I did this)
October 18, 2024 at 3:14 PM
Didn't have the correct power cable 😭 (don't worry, my soldering has improved a lot since I did this)
Interesting, that would be great, thanks. I don't have access to the official spec lol, so I'm just going off of what I can find.
October 18, 2024 at 3:13 PM
Interesting, that would be great, thanks. I don't have access to the official spec lol, so I'm just going off of what I can find.
Oh, what do you mean? The DQS pairs aren't matched to the correct set of data bus pins? How are you supposed to deal with that.... I used a random desktop motherboard for reference to get my pinout in case that helps lol.
October 18, 2024 at 2:50 PM
Oh, what do you mean? The DQS pairs aren't matched to the correct set of data bus pins? How are you supposed to deal with that.... I used a random desktop motherboard for reference to get my pinout in case that helps lol.
Thanks! It already helped me learn a lot about how this kind of memory works, and I hope it opens the door for doing some more interesting non-standard stuff. I sure hope it won't be useless haha.
October 18, 2024 at 2:39 PM
Thanks! It already helped me learn a lot about how this kind of memory works, and I hope it opens the door for doing some more interesting non-standard stuff. I sure hope it won't be useless haha.