titzerbl.bsky.social
@titzerbl.bsky.social
Don't question the power talk of the go-jillionaires!
November 19, 2025 at 3:59 PM
A more generous interpretation is that he meant they need to *move* more electrons...which is more or less true. AI is limited by electrical power generation at this point.
November 19, 2025 at 3:56 PM
It wouldn't be x86 otherwise!
November 14, 2025 at 1:40 AM
Indexing an array and the array length are two slightly different cases IMO. In the first, obviously there is a dynamic check (and Virgil allows any-sized or any-signed integers as an index). In the later, the length being unsigned encodes an invariant useful to other code.
November 13, 2025 at 6:52 PM
The Virgil compiler interprets its SSA representation directly, as compile-time initialization allows the full language--a simplification after two generations of customized interpreters. It does basically what Mike wrote, except gotos assign the values of phis instead of looking them up.
November 13, 2025 at 1:32 PM
Numeric types are actually pretty tricky to get right in language design. FWIW, Virgil defines array lengths to be 32-bit signed integers, like Java. Yet array and range indexing is overloaded to allow any integer type as an index. github.com/titzer/virgi...
github.com
November 12, 2025 at 4:34 PM
Not sure I buy this. One nice principle is "make invalid states unrepresentable" and unsigned types are one mechanism for that.

The irony is that up until C23, overflow of signed integers was UB, and now it's defined to wrap. So this stuff about "compiler will catch errors" is tripe.
November 12, 2025 at 3:24 PM
I'm curious if your backend is targeting Wasm GC or linear memory.
October 12, 2025 at 2:09 PM
Yes, thanks. I have trouble operating the internet.
September 16, 2025 at 2:26 PM
Heart skipped a beat.
May 23, 2025 at 11:07 PM
Yeah, unaligned loads are generally pretty fast on intel, but keep in mind that you're benefiting a lot from a forward scan, so prefetching is going to have cache lines ready. It hurts most when you cross a cache line boundary, which is only a fraction of accesses.
May 23, 2025 at 11:05 PM
In other channels, we've been discussing holding a Wasm tooling tutorial at SPLASH in Singapore. Is that something that interests you as well?
April 11, 2025 at 4:07 PM
:(
April 9, 2025 at 10:35 PM