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EDN: RISC-V Summit spurs new round of automotive support
EDN: RISC-V adoption in automotive applications is accelerating, with new partnerships and certified processor cores enabling software-defined vehicles and safety-critical systems. Collaborations among Quintauris, Andes, Lauterbach, Tenstorrent, and Codasip are... The post EDN: RISC-V Summit spurs new round of automotive support appeared first on RISC-V International.
riscv.org
November 14, 2025 at 5:05 AM
riscv.org.web.brid.gy
WebProNews: RISC-V’s ISO Milestone: Open ISA Poised for Global Dominance
WebProNews: RISC-V International has achieved Publicly Available Specification (PAS) Submitter status from ISO/IEC JTC1, marking a major step toward international standardization of its open instruction set architecture. This milestone positions... The post WebProNews: RISC-V’s ISO Milestone: Open ISA Poised for Global Dominance appeared first on RISC-V International.
riscv.org
November 14, 2025 at 5:05 AM
riscv.org.web.brid.gy
We’re Showcasing RISC-V at SC25, the World’s Largest Supercomputing Conference
I’m heading to SC25 in St. Louis next week to advocate for the growing role of RISC-V in high-performance computing (HPC), alongside my peers in the RISC-V HPC special interest... The post We’re Showcasing RISC-V at SC25, the World’s Largest Supercomputing Conference appeared first on RISC-V International.
riscv.org
November 13, 2025 at 5:05 AM
riscv.org.web.brid.gy
EEWorldOnline: MIPS releases multithreaded processor for edge computing
EEWorldOnline: MIPS has begun sampling its new I8500 processor, a scalable, multithreaded data movement processor IP designed for real-time, event-driven computing across hyperscale, automotive, industrial, and communications markets. Optimized for... The post EEWorldOnline: MIPS releases multithreaded processor for edge computing appeared first on RISC-V International.
riscv.org
November 13, 2025 at 5:05 AM
riscv.org.web.brid.gy
RISC-V International Names Tom Gall as Vice President of Technology
Open-technology veteran Gall will drive RISC-V International’s technical vision and collaboration strategy, strengthening the organisation’s push for worldwide adoption of the RISC-V ISA. The post RISC-V International Names Tom Gall as Vice President of Technology appeared first on RISC-V International.
riscv.org
November 8, 2025 at 5:04 AM
riscv.org.web.brid.gy
EDN: The next RISC-V processor frontier: AI
EDN: At RISC-V Summit North America 2025, industry leaders unveiled the latest advances in CPU cores, vector processors, and AI-powered designs shaping the next wave of open computing. The event... The post EDN: The next RISC-V processor frontier: AI appeared first on RISC-V International.
riscv.org
November 7, 2025 at 5:04 AM
riscv.org.web.brid.gy
All About Circuits: Upbeat Technology’s RISC-V MCU Takes Flight With Near-Threshold Computing
All About Circuits: Developed with SiFive, the dual-core SoC uses patented error correction to achieve a record 16.8 µW/MHz/DMIPS, targeting next-gen wearables, drones, and IoT sensors. In a move aimed... The post All About Circuits: Upbeat Technology’s RISC-V MCU Takes Flight With Near-Threshold Computing appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:04 AM
riscv.org.web.brid.gy
EETimes: Google Open-Sources NPU IP, Synaptics Implements It
EETimes: Google Research has open-sourced its Coral NPU IP (previously codenamed Kelvin), which it is giving to the industry in a bid to accelerate edge AI implementations by reducing fragmentation and... The post EETimes: Google Open-Sources NPU IP, Synaptics Implements It appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:04 AM
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Introducing the RISCstar toolchain for RISC-V
The newly released RISCstar toolchain is a pre-compiled family of GNU toolchains for RISC-V developers. It supports the entire RISC-V ecosystem, from the latest 64-bit application processors, right down to... The post Introducing the RISCstar toolchain for RISC-V appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:05 AM
riscv.org.web.brid.gy
RISC-V Takes First Step Toward International Standardization as ISO/IEC JTC1 Grants PAS Submitter Status
At RISC-V Summit North America 2025, Andrea Gallo, CEO RISC-V International, and Phil Wennblom, Chair of the ISO/IEC Joint Technical Committee (JTC 1)., announced that RISC-V International has been approved as a PAS Submitter by the ISO/IEC JTC1. The post RISC-V Takes First Step Toward International Standardization as ISO/IEC JTC1 Grants PAS Submitter Status appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:04 AM
riscv.org.web.brid.gy
SemiWiki: Insights from the 2025 RISC-V Summits and Andes Technology’s Pivotal Role
Annual RISC-V Summits, organized by RISC-V International, serve as vital hubs for innovation, writes SemiWiki's Daniel Nenni. The post SemiWiki: Insights from the 2025 RISC-V Summits and Andes Technology’s Pivotal Role appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:05 AM
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NewElectronics: RISC-V International to Announce 25% Market Penetration
RISC-V International is set to announce that silicon on the open-standard has reached 25% market penetration, according to research from SHD Group whose findings on RISC-V’s market share are expected to be released at the upcoming RISC-V Summit North America. The post NewElectronics: RISC-V International to Announce 25% Market Penetration appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:04 AM
riscv.org.web.brid.gy
Ashling and Embecosm Extend PyTorch AI to RISC-V Embedded Devices
At RISC-V North American Summit in Santa Clara, Ashling and Embecosm today announced robust ExecuTorch implementations optimised for resource-constrained devices, including RISC-V based microcontrollers. The collaboration enables developers to deploy... The post Ashling and Embecosm Extend PyTorch AI to RISC-V Embedded Devices appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:05 AM
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Optimizing Hardware for Neural Network Inference using Virtual Prototypes
The post Optimizing Hardware for Neural Network Inference using Virtual Prototypes appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:04 AM
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New Course Coming Soon: Porting Software to RISC-V (LFD 114)
The knowledge gap for porting software to RISC-V is about to close. RISCstar Solutions, in close collaboration with RISC-V International and the Linux Foundation, has developed a comprehensive online training... The post New Course Coming Soon: Porting Software to RISC-V (LFD 114) appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:04 AM
riscv.org.web.brid.gy
Tom’s Hardware: Risc-V Set to Announce 25% Market Penetration
RISC-V International plans to announce that silicon on the open-standard has reached 25% market penetration later this month, says Tom’s Hardware writer Sunny Grimm. Market analysts SHD Group are primed... The post Tom’s Hardware: Risc-V Set to Announce 25% Market Penetration appeared first on RISC-V International.
riscv.org
October 30, 2025 at 5:06 AM
riscv.org.web.brid.gy
NEW COURSE COMING SOON: Porting Software to RISC-V (LFD 114)
The knowledge gap for porting software to RISC-V is about to close. RISCstar Solutions, in close collaboration with RISC-V International and the Linux Foundation, has developed a comprehensive online training...
riscv.org
October 20, 2025 at 4:56 AM
riscv.org.web.brid.gy
RISC-V set to announce 25% market penetration — open-standard ISA is ahead of schedule, securing fast-growing silicon footprint
ARM has some competition in the reduced-complexity chip space, and it’s gaining ground quickly. RISC-V International plans to announce that silicon on the open-standard has reached 25% market penetration later this...
riscv.org
October 20, 2025 at 4:57 AM
riscv.org.web.brid.gy
EE Times: Why RISC-V + Blockchain Is the Conversation I’ve Been Waiting to Have
In this article for EE Times, Daniela Barbosa, General Manager of Decentralized Technologies at the Linux Foundation and Executive Director of LF Decentralized Trust, argues that RISC-V isn’t just another... The post EE Times: Why RISC-V + Blockchain Is the Conversation I’ve Been Waiting to Have appeared first on RISC-V International.
riscv.org
October 29, 2025 at 5:01 AM
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EE Times: Why RISC-V + Blockchain Is the Conversation I’ve Been Waiting to Have
The open RISC-V ISA has always been about freedom and flexibility in hardware design. Now a compelling new use case gives developers a software-only abstraction layer, taking privacy and flexibility to new heights.
riscv.org
October 20, 2025 at 4:57 AM
riscv.org.web.brid.gy
IoT Analytics: MCU Market a $7 Billion Opportunity by 2030, Driven by Industrial and Edge AI
The IoT (Internet of Things) microcontroller (MCU) market reached US $5.1 billion in 2024, says IoT Analytics’ Satyajit Sinha, and is projected to grow at a compound annual growth rate... The post IoT Analytics: MCU Market a $7 Billion Opportunity by 2030, Driven by Industrial and Edge AI appeared first on RISC-V International.
riscv.org
October 24, 2025 at 4:59 AM
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IoT MCU market: $7 billion opportunity by 2030, driven by industrial and edge AI
In short The IoT MCU market reached $5.1 billion in 2024, according to IoT Analytics’ IoT Microcontrollers Market Report 2025–2030 (published October 2025). This marks a small year-over-year contraction in the market;...
riscv.org
October 20, 2025 at 4:57 AM
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Europe Achieves a Key Milestone with the Europe’s First Out-of-Order RISC-V Processor chip, with the eProcessor Project
The eProcessor Project today announced the successful development and deployment of the Europe’s first out-of-order RISC-V processor silicon. The processor, manufactured in a 22nm process, represents a leap forward in... The post Europe Achieves a Key Milestone with the Europe’s First Out-of-Order RISC-V Processor chip, with the eProcessor Project appeared first on RISC-V International.
riscv.org
October 23, 2025 at 4:58 AM
riscv.org.web.brid.gy
Europe Achieves a Key Milestone with the Europe’s First Out-of-Order RISC-V Processor chip, with the eProcessor Project
In a historic breakthrough for the global tech industry, the eProcessor Project proudly announces the successful development and deployment of the Europe’s first out-of-order RISC-V processor silicon. This innovative processor,...
riscv.org
October 20, 2025 at 4:57 AM
riscv.org.web.brid.gy
Quintauris and Lauterbach Elevate RISC-V Debug & Trace Capabilities for Automotive
Munich and Hoehenkirchen, Germany — October 7th 2025 – Quintauris, a global provider of RISC-V based products, and Lauterbach, the global leader in embedded debug and trace solutions, today announced...
riscv.org
October 20, 2025 at 4:57 AM