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ataylorfpga.bsky.social
@ataylorfpga.bsky.social
I bought two of these boards in 2016, one for a friend one for me. I forgot about mine until last night.
November 30, 2024 at 6:29 PM
Quite impressed with the PCBite range from sensepeek. Came across them on a random tweet, it give the ability to probe with scopes, drive, observe digital signals and of course power boards hands free. Perfect for production test.
November 30, 2024 at 12:14 PM
The ability to debug our FPGA applications is critical. This week I am looking at ChipScoPy, which enables us to leverage Python and Jupyter notebooks to work with ILAs, VIO and the hard debug peripherals in Versal devices.

www.adiuvoengineering.com/post/microze...
MicroZed Chronicles: ChipScoPy
When it comes to debugging designs the more visibility and control we have over debugging elements such as ILAs is critical. When we are working with AMD Versal device such as Versal Prime, Edge or Co...
www.adiuvoengineering.com
November 27, 2024 at 9:24 AM
Reposted
I thoroughly enjoyed this webinar yesterday.

www.youtube.com/watch?v=5Q6K...

looking forward to what @ataylorfpga.bsky.social comes up with for next years webinars 🫡
November 22, 2024 at 7:52 PM
Fridays are for demos, so check out our latest Hackster project which shows how we can use a Arty A7, with MicroBlaze V, and Jupyter Labs to create a really cool robot arm demo we can control from our PC or program and replay sequences also

www.hackster.io/adam-taylor/...
November 22, 2024 at 2:11 PM
I am very impressed with how Vitis Unified using the HLS flow has been able to target to the Versal DSP58 in FP32 mode for the equation I was implementing in last weeks blog. Significantly less resources than required using the native VHDL 2008 float package.
November 18, 2024 at 7:44 PM
This week I was taking a look at the differences in resources required to implement the same algorithm when using the VHDL 2008 fixed and floating point packages.

www.adiuvoengineering.com/post/microze...
MicroZed Chronicles: Fixed and Floating Point Maths
A short time ago I hosted a webinar which looked at how we can implement mathematics within programmable logic. In this webinar we examined how we could create mathematics applications using RTL, HLS ...
www.adiuvoengineering.com
November 15, 2024 at 8:18 PM
Last week we ran a webinar on implementing maths in FPGA. One of the attendees asked the question what the difference in implementation size would be between fixed and floating point.

#fpga #embeddedsystems #engineering #embeddedsoftware #engineering

www.adiuvoengineering.com/post/microze...
MicroZed Chronicles: Fixed and Floating Point Maths
A short time ago I hosted a webinar which looked at how we can implement mathematics within programmable logic. In this webinar we examined how we could create mathematics applications using RTL, HLS ...
www.adiuvoengineering.com
November 13, 2024 at 9:41 AM