Happy #FPGAFriday. The hardware for the next installment of 🏝️ Isle #FPGA Computer is ready; now I'm working on docs, a new blog post, and an update for my sponsors. I'm aiming for a public update next Friday. [1/2]
September 26, 2025 at 10:56 AM
Happy #FPGAFriday. The hardware for the next installment of 🏝️ Isle #FPGA Computer is ready; now I'm working on docs, a new blog post, and an update for my sponsors. I'm aiming for a public update next Friday. [1/2]
No FPGA for me today 😢, so I'd appreciate hearing about your hardware projects. #FPGAFriday
August 22, 2025 at 9:44 AM
No FPGA for me today 😢, so I'd appreciate hearing about your hardware projects. #FPGAFriday
Hello hardware friends, it's a hot #FPGAFriday on the south coast. I'm writing tests and docs today, which is surprisingly satisfying if it's for a project you care about.
What are you working on today?
What are you working on today?
June 20, 2025 at 9:43 AM
Hello hardware friends, it's a hot #FPGAFriday on the south coast. I'm writing tests and docs today, which is surprisingly satisfying if it's for a project you care about.
What are you working on today?
What are you working on today?
Got time to add more letters on the train yesterday. Happy #FPGAFriday.
May 2, 2025 at 10:03 AM
Got time to add more letters on the train yesterday. Happy #FPGAFriday.
It's about time I updated my recommended #FPGA links. Send me a suggestion this #FPGAFriday. 😊 projectf.io/recommended-...
Recommended FPGA Sites
This page collects some of my favourite FPGA resources from across the Internet.
FPGA Learning Resources Black Mesa Labs FPGA Tutorial Bruno Levy’s Learn FPGA fpga4fun.com fpgacpu.ca Nandland Project ...
projectf.io
March 21, 2025 at 9:58 AM
It's about time I updated my recommended #FPGA links. Send me a suggestion this #FPGAFriday. 😊 projectf.io/recommended-...
Fearlessly generate your own clocks with Lattice ECP5 #FPGAs and Yosys. Includes worked examples for #ULX3S and easy to adapt to any dev board. Happy #FPGAFriday! @yosyshq.com projectf.io/posts/ecp5-f...
ECP5 FPGA Clock Generation
Yosys and nextpnr have excellent support for Lattice ECP5 FPGAs. However, without using the ECP5 PLL (phase-locked loop), you’re stuck running at the speed of your dev board oscillator. This post outl...
projectf.io
January 31, 2025 at 9:42 AM
Fearlessly generate your own clocks with Lattice ECP5 #FPGAs and Yosys. Includes worked examples for #ULX3S and easy to adapt to any dev board. Happy #FPGAFriday! @yosyshq.com projectf.io/posts/ecp5-f...