https://tinytapeout.com
more spec 🧵.
git:
github.com/pongsagon/tt...
more spec 🧵.
git:
github.com/pongsagon/tt...
There are still 2 discounted dev kits left - tapeout and receive a physical copy of the chip for just €185!
There are still 2 discounted dev kits left - tapeout and receive a physical copy of the chip for just €185!
We still have 36 early bird dev kits available, so you can tapeout and receive a copy of the ASIC for just €185!
Plenty of interesting projects already submitted: app.tinytapeout.com/shuttles/tts...
We still have 36 early bird dev kits available, so you can tapeout and receive a copy of the ASIC for just €185!
Plenty of interesting projects already submitted: app.tinytapeout.com/shuttles/tts...
A great insight from Nanik Adnani in my latest interview: www.youtube.com/watch?v=hVej...
A great insight from Nanik Adnani in my latest interview: www.youtube.com/watch?v=hVej...
There are still 70 early bird dev kits left, which mean you can do a full custom tapeout for just €185!
Get started here: tinytapeout.com
There are still 70 early bird dev kits left, which mean you can do a full custom tapeout for just €185!
Get started here: tinytapeout.com
www.youtube.com/watch?v=dbEW...
www.youtube.com/watch?v=dbEW...
www.youtube.com/watch?v=dbEW...
www.youtube.com/watch?v=dbEW...
#RISCV #TinyTapeout
www.youtube.com/watch?v=dbEW...
#RISCV #TinyTapeout
By far the smallest generative art I've done so far 👀
tinytapeout.com/chips/ttsky2...
By far the smallest generative art I've done so far 👀
Imagine it, then put it into silicon.
Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks.
Check - t.co/vBGGA2i0uX
Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.
Imagine it, then put it into silicon.
Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks.
Check - t.co/vBGGA2i0uX
Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.
This shuttle has the highest utilisation we’ve seen at this stage before tapeout!
#TinyTapeout #ASIC #opensource
Get involved here: tinytapeout.com
This shuttle has the highest utilisation we’ve seen at this stage before tapeout!
#TinyTapeout #ASIC #opensource
Get involved here: tinytapeout.com
www.youtube.com/watch?v=BVMj...
www.youtube.com/watch?v=BVMj...
Isle is a simple, modern computer — an open design that encourages tinkering, experimentation, and doing your own thing. I hope to inspire you to come on a journey with me and build your own computer. projectf.io/isle/fpga-co...
bsky.app/profile/roha...
TT FPGA controls seven-segment display via spi-slave and the RP2040 just sends it a 6-bit message to light up the LEDs.
bsky.app/profile/roha...
If so, this is a great opportunity to get your very own design integrated into a Risc-V SoC and made in silicon! And it's free to take part.
You're invited to design peripherals (UARTs, timers, synths, etc.) for a @riscv.org.web.brid.gy chip that will be fabbed for real!
Take part for free!
tinytapeout.com/competitions...
If so, this is a great opportunity to get your very own design integrated into a Risc-V SoC and made in silicon! And it's free to take part.
FPGAs are ❤️.
FPGA brother to tinytapeout ASIC by Michael Bell aka @rebelmike.bsky.social
@tinytapeout.com @mattvenn.net @urishaked.bsky.social
FPGAs are ❤️.
FPGA brother to tinytapeout ASIC by Michael Bell aka @rebelmike.bsky.social
@tinytapeout.com @mattvenn.net @urishaked.bsky.social
With the #TinyTapeout competition using it, I'm trying to make sure there's no lurking issues!
With the #TinyTapeout competition using it, I'm trying to make sure there's no lurking issues!
Stream starts at 8:00 PT / 17:00 CEST / 21:30 IST
www.youtube.com/live/7VM_dW1...
#opensourcesiliconstream #ASIC
Stream starts at 8:00 PT / 17:00 CEST / 21:30 IST
www.youtube.com/live/7VM_dW1...
#opensourcesiliconstream #ASIC
You're invited to design peripherals (UARTs, timers, synths, etc.) for a @riscv.org.web.brid.gy chip that will be fabbed for real!
Take part for free!
tinytapeout.com/competitions...
You're invited to design peripherals (UARTs, timers, synths, etc.) for a @riscv.org.web.brid.gy chip that will be fabbed for real!
Take part for free!
tinytapeout.com/competitions...
You're invited to design peripherals (UARTs, timers, synths, etc.) for a @riscv.org.web.brid.gy chip that will be fabbed for real!
Take part for free!
tinytapeout.com/competitions...